IEEE 4th Annual Workshop on Workload Characterization

Held in Conjunction with MICRO-34

December 2, 2001

ACES Building
24th and Speedway
The University of Texas
Austin, Texas, USA

WWC-4: Advance Program

Sponsored by IEEE and the Technical Committee on Computer Architecture


7:15 AM

Breakfast and Registration

8:00 AM

Session 1: Benchmarks and Data Sets

Chair: Ann Marie Maynard, IBM
  • MiBench: A Free, Commercially Representative Embedded Benchmark Suite
    Matthew R. Guthaus, Jeffrey S. Ringenberg, Dan Ernst, Todd M. Austin, Trevor Mudge and Richard B. Brown (University of Michigan)
  • SPEClite: Using Representative Samples to Reduce SPEC CPU2000 Workload
    Rajat Todi (Hewlett Packard)

8:45 AM

Keynote

9:45 AM

Coffee Break

10:15 AM

Session 2.a: Contemporary Applications

Chair: Chuck Moore, Parthus
  • Characterization of TPC-H Queries on AMD AthlonTM Microprocessors
    Michael Clark (AMD), Ajaya Durg (Intel) and Kevin Lienenbrugger (Agere Systems)
  • Workload Characterization of Multithreaded Java Servers on Two PowerPC Processors
    Pattabi Seshadri (UT-Austin) and Alex Mericas (IBM)
  • A Characterization of Speech Recognition on Modern Computer Systems
    Kartik Agaram, Stephen W. Keckler and Doug Burger (The University of Texas at Austin)
  • Performance Characteristics of ItaniumTM Processor on Data Encryption Algorithms
    Tuan H. Bui (Intel Corporation)

10:15 AM

Session 2.b: Predictability and Phase Characteristics

Chair: David Christie, AMD
  • Characterization of Data Value Unpredictability to Improve Predictability
    Renju Thomas and Manoj Franklin (University of Maryland)
  • An Analysis of the Amount of Global Level Redundant Computation in the SPEC 95 and SPEC 2000 Benchmarks
    Joshua J. Yi and David J. Lilja (University of Minnesota - Twin Cities)
  • Examining Performance Differences in Workload Execution Phases
    Jeanine Cook, Richard L. Olive, and Eric E. Johnson (New Mexico State University)
  • Runtime Predictability of Loops
    Marcos R. de Alba and David R. Kaeli (Northeastern University)

12:00 PM

Lunch

1:30 PM

Session 3.a: Tools and Techniques

Chair: Trevor Mudge, Michigan
  • An Application-Centric ccNUMA Memory Profiler
    Uros Prestor and Alan L. Davis (University of Utah)
  • Palmist: A Tool to Log Palm System Activity
    Raghunath Gannamaraju and Surendar Chandra (University of Georgia)
  • Compressing Address Traces with RECET
    Jari Ahola (Tampere University of Technology, Finland)

1:30 PM

Session 3.b: Modeling

Chair: Lizy John, UT
  • Cache Characterization Surfaces and Predicting Workload Miss Rates
    Elizabeth S. Sorenson and J. Kelly Flanagan (Brigham Young University)
  • A Comprehensive Model of the Supercomputer Workload
    Walfredo Cirne (Universidade Federal da Paraiba) and Francine Berman (UCSD)
  • Modeling Application Performance by Convolving Machine Signatures with Application Profiles
    Allan Snavely, Nicole Wolter and Laura Carrington (University of California, San Diego)

2:40 PM

Coffee Break

3:00 PM

Session 4.a: Internet and Servers

Chair: Ram Rajamony, IBM
  • DNS-based Internet Client Clustering and Characterization
    Azer Bestavros and Sumit Mehrotra (Boston University)
  • Synthetic Trace Generation for the Internet
    W. Shi, M. H. MacGregor and P. Gburzynski (University of Alberta)
  • Characterization of JavaTM Application Server Workloads
    Kingsum Chow, Mahesh Bhat, Ashish Jha and Colin Cunningham (Intel Corporation)

3:00 PM

Session 4.b: Memory

Chair: Sally McKee, Utah
  • Memory Performance Analysis of SPEC2000C for the Intel Itanium TM Processor
    Mauricio J. Serrano and Youfeng Wu (Intel Corporation)
  • Memory Energy Characterization and Optimization for the SPEC2000 Benchmarks
    N. Kirubanandan, A. Sivasubramaniam, N. Vijaykrishnan, M. Kandemir and M. J. Irwin (Pennsylvania State University)

4:15 PM

Panel Session
Is there any scientific process available for creating benchmark suites?

If you look at existing benchmark suites, some contain programs which are run multiple times or so to create a long running benchmark. In some cases, the data set sizes are inflated to create a benchmark that will not fit in the data cache. Are these approaches scientific? Synthetic benchmarks from the 'stone ages' abstracted specific features of programs and artificially created benchmarks. Was that more scientific than the current approaches? Is there any scientific process available? If not what should the scientific process to create benchmark suites be?

Panelists:
  • Bill Alexander, IBM
  • Doug Burger, The University of Texas at Austin
  • Tom Conte, North Carolina State University
  • Trevor Mudge, University of Michigan
  • Michael Paton, AMD
Moderator:
  • Lizy John, The University of Texas at Austin

Wen-mei W. Hwu

Wen-mei W. Hwu is Franklin Woeltge Professor at the Department of Electrical and Computer Engineering, University of Illinois at Urbana-Champaign. From 1997 to 1999, he served as the chairman of the Computer Engineering Program at the University of Illinois. His research interest is in the area of architecture, implementation, and compilation for high performance computer systems. He is the director of the IMPACT project, which has delivered new compiler and computer architecture technologies to the computer industry since 1987. For his contributions to the areas of compiler optimization and computer architecture, he received the 1993 Eta Kappa Nu Outstanding Young Electrical Engineer Award, the 1994 Xerox Award for Faculty Research, the 1994 University Scholar Award of the University of Illinois, the 1997 Eta Kappa Nu Holmes MacDonald Outstanding Teaching Award, the 1998 ACM SigArch Maurice Wilkes Award, the 1999 ACM Grace Murray Hopper Award. and the 2001 Tau Beta Pi Daniel C. Drucker Eminent Faculty Award. He is an IEEE Fellow. Dr. Hwu received his Ph.D. degree in Computer Science from the University of California, Berkeley.

Location:

The workshop, along with all Micro-34 workshops, will be held in the ACES Building at the University of Texas Campus. The ACES building is located at the SouthEast corner of 24th Street and Speedway (map). There will be a bus available for participants lodging at the Marriott.


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