WWC-6: IEEE 6th Annual Workshop on Workload Characterization

October 27, 2003


Austin Marriott at the Capitol

Austin, Texas, USA


WWC-6 Advance Program

Sponsored by IEEE and the Technical Committee on Computer Architecture

7:45 AM - 8:15 AM


8:15 AM - 9:25 AM

Session 1: Contemporary Applications 


(Chair: Rema Hariharan, Sun)


  • A Characterization of Visual Feature Recognition

Binu Mathew, Al Davis, and Robert Evans (University of Utah)

  •  Towards Workload Characterization of Auction Sites

Daniel A. Menasce and Vasudeva Akula (George Mason University)

  •  Improving the Performance of OLTP Workloads on SMP Computer Systems by  Limiting Modified Cache Lines

John E. Black, Daniel F. Wright, and Emilio M. Salgueiro (Unisys Corporation)

9:25 AM - 9:45 AM

Coffee Break

9:45 AM - 10:55 AM

Session 2: Network Characterization


(Chair: David Murrell, Motorola)


  • Performance Characterization of TCP/IP Packet Processing in Commercial Server Workloads

    Srihari Makineni and Ravi Iyer (Intel Corporation)

  • PacketBench: A Tool for Workload Characterization of Network Processing

    Ramaswamy Ramaswamy and Tilman Wolf (University of Massachusetts, Amherst)

  • Evaluating and Modeling Window Synchronization in Highly Multiplexed Flows

    Jim Gast and Paul Barford (University of Wisconsin, Madison)

11:00 AM - 12:00 PM


  • Accurate Analytical Modeling of Superscalar Processors

Prof. Jim Smith (University of Wisconsin, Madison)

This talk will describe ongoing work on developing an analytical model for superscalar processors. Input parameters for this model include a number of workload properties -- in essence, those workload properties that appear to have the greatest overall effect on processor performance.

12:00 PM - 1:00 PM

Lunch (provided)

1:00 PM - 2:10 PM

Session 3: Memory and Disk Characterization


(Chair: Doug Burger, University of Texas)


  • An Analysis of Disk Performance in VMware ESX Server Virtual Machines

    Irfan Ahmad, Jennifer M. Anderson, Anne M. Holler, Rajit Kambo, and Vikram Makhija (VMware Incorporation)

  • Intrinsic Data Locality of Modern Scientific Workloads

    Sharath Ramanathan, Ramkumar Srinivasan, and Jeanine Cook (New Mexico State University)

  • Real-time L3 Cache Simulations Using the Programmable Hardware-Assisted Cache Emulator (PHA$E)

Nirut Chalainanont, Eriko Nurvitadhi, Roger Morrison, Lixin Su, Kingsum Chow, Shih-Lien Lu, and Konrad Lai (Intel Corporation)

2:10 PM - 2:30 PM

Coffee Break

2:30 PM - 3:45 PM

Session 4: Phases and Streams


(Chair: Charles R Lefurgy, IBM)


  • Exploiting Streams in Instruction and Data Address Trace Compression

    Aleksandar Milenkovic and  Milena Milenkovic (The University of Alabama in Huntsville)

  • Identifying Program Power Phase Behavior Using Power Vectors

    Canturk Isci and Margaret Martonosi (Princeton University)

  • Characterization of embedded applications for decoupled processor architecture

    Assia Djabelkhir and Andre Seznec (IRISA, Compus deBeaulieu, France)

4:00 PM - 5:00 PM

Panel Discussion

  •  "Future Workload Predictions and Implications for Computer System Design"

Benchmarks tend to look backwards. But to design a good computer system, you also need to look forward and anticipate what future workloads will look like. In this panel, the panelists will describe their thoughts and observations about trends in computer workloads. How will they be different than today's workloads? What will cause these changes? What are the implications for future computer systems design? How can we design systems that are best prepared for the currently unknown characteristics of future workloads?

  • Panelists: 

Steve Keckler, University of Texas ( Slide )

Avi Kumar, Intel Corporation ( Slide )

Brian O'Krafka, Sun Microsystems ( Slide )

Robert S. Pearlman, Optive Research ( Slide )

Ram Rajamony, IBM ( Slide )

  • Moderator: 

           Chuck Moore, University of Texas


The workshop will be held at the Austin Marriott at the Capitol.